DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
JNTUH COLLEGE OF ENGINEERING HYDERABAD (AUTONOMOUS)
Kukatpally, Hyderabad – 500 085.
Academic year 2017-2018
TIME TABLE FOR B.TECH. V/V – IDP (M.Tech)-(I-Semester)
Class Room: E-120 W.E.F: 03-07-2017
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DAY
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9.40 – 11.20
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11.20 – 1.00
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1.00-2.00
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2.00 – 3.40
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3.40 – 4.30
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MON
|
MMA
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FACTS
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LUNCH BREAK
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Project Work.
|
Project Work
|
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TUE
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FACTS
|
PQ
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SEMINAR
|
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WED
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VLSI
DESIGN
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MMA
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Project Work
|
Project Work
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THU
|
Project Work
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Project Work
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Project Work
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Project Work
|
|
FRI
|
PQ
|
VLSI
DESIGN
|
Project Work
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Project Work
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PGE-V: PG Elective-V: PQ: Power Quality : Sri. K. Naresh
PGE-III: PG Elective-III: VLSI DESIGN : Sri. M. Venu
PGE-IV: PG Elective-IV: FACTS: Flexible AC Transmission Systems: Sri. G. Chandra Shekar
PGC-V: PG Core-V: MMA: Machine Modeling Analysis: Smt.M.Vani sri
Seminar: Dr.G.N.Srinivas / TA
H.E.E.E.D
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